A task commonly handled by a compiler is memory disambiguation, which may include detection of unaliased memory accesses, e.g., loads or stores that visit different memory locations. These operations may be scheduled to run out of order for better instruction-level parallelism. In contrast, memory operations that visit the same memory location(s) are labeled as “aliased,” and cannot be scheduled out of order.
Memory disambiguation often is included in compiler optimization, e.g., software pipelining. Software pipelining can exploit instruction-level parallelism for a loop by overlapping execution of successive iterations. However, overlap of execution of operations in successive iterations can produce aliases.